Intel BX80571E7500 Programming Manual - Page 53
Msg_in_match, Msgs_in_non_snp, Msg_opcode_addr_in_match, Msg_opcode_in_match, Msg_opcode_out_match,
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INTEL® XEON® PROCESSOR 7500 SERIES UNCORE PROGRAMMING GUIDE UNCORE PERFORMANCE MONITORING MSG_IN_MATCH • Title: Message In Match • Category: Mask/Match • Event Code: 0x01, Max. Inc/Cyc: 1, PERF_CTL: 1, • Definition: Message Class Match at B-Box Input. Use B_MSR_MATCH/MASK_REG MSGS_IN_NON_SNP • Title: Incoming Non-Snoop Messages • Category: Snoops • Event Code: 0x01, Max. Inc/Cyc: 1, PERF_CTL: 2, • Definition: Incoming Non-Snoop Messages. MSG_OPCODE_ADDR_IN_MATCH • Title: Message + Opcode + Address In Match • Category: Mask/Match • Event Code: 0x03, Max. Inc/Cyc: 1, PERF_CTL: 0, • Definition: Message Class, Opcode and Address Match at B-Box Input. Use B_MSR_MATCH/ MASK_REG MSG_OPCODE_IN_MATCH • Title: Message + Opcode In Match • Category: Mask/Match • Event Code: 0x05, Max. Inc/Cyc: 1, PERF_CTL: 1, • Definition: Message Class and Opcode Match at B-Box Input. Use B_MSR_MATCH/MASK_REG MSG_OPCODE_OUT_MATCH • Title: Message + Opcode Out Match • Category: Mask/Match • Event Code: 0x06, Max. Inc/Cyc: 1, PERF_CTL: 1, • Definition: Message Class and Opcode Match at B-Box Output. Use B_MSR_MATCH/MASK_REG MSG_OUT_MATCH • Title: Message Out Match • Category: Mask/Match • Event Code: 0x02, Max. Inc/Cyc: 1, PERF_CTL: 1, • Definition: Message Class Match at B-Box Output. Use B_MSR_MATCH/MASK_REG MSGS_S_TO_B • Title: SB Link (S to B) Messages • Category: S-Box Interface • Event Code: 0x02, Max. Inc/Cyc: 1, PERF_CTL: 2, • Definition: Number of SB Link (S to B) Messages. OPCODE_ADDR_IN_MATCH • Title: Opcode + Address In Match • Category: Mask/Match • Event Code: 0x02, Max. Inc/Cyc: 1, PERF_CTL: 0, • Definition: Opcode and Address Match at B-Box Input. Use B_MSR_MATCH/MASK_REG 2-41