Sharp SD-EX101 Service Manual - Page 73

IC900 VHiPCM1748E-1: D/A Converter PCM1748E

Page 73 highlights

IC900 VHiPCM1748E-1: D/A Converter (PCM1748E) Pin No. 1 2 3 4 5 6 7 8 9 10 11* 12* 13 14 15 16 Terminal Name BCK DATA LRCK DGND VDD VCC VOUTL VOUTR AGND VCOM ZEROR/ZEROA ZEROL/NA MD MC ML SCK Input/ Output Input Input Input - - - Output Output - - Output Output Input Input Input Input Function Audio data bit clock input. Audio data digital input. L-channel and R-channel audio data latch enable input. Digital ground. Digital power supply,+3.3V. Analog power supply,+5V. Analog output for L-channel. Analog output for R-channel. Analog ground. Common voltage decoupling. Zero flag output for R-channel/Zero flag output for L/R-channel. Zero flag output for L-channel/No assign. Mode control data input. Mode control clock input. Mode control latch input. System clock input NOTE: (1) Schmitt trigger input,5V tolerant. (2) Schmitt trigger input with internal pull-down,5V tolerant In this unit, the terminal with asterisk mark (*) is open terminal which is not connected to the outside. SD-EX100 SD-EX101 (1) (1) (1) (2) (2) (2) AGND 9 VCOM 10 6 VCC ZEROR/ZEROA 11 5 VDD ZEROL/NA 12 MD 13 MC 14 ML 15 SCK 16 8 VOUTR 7 VOUTL 4 DGND 3 LRCK 2 DATA 1 BCK BCK 1 LRCK 3 DATA 2 Audio Serial Port ML 15 MC 14 MDI 13 Serial Control Port 8x Oversampling Digital Filter with Function Controller Enhanced Multi-level Delta-Sigma Modulator SCK 16 System Clock System Clock Manager Zero Detect 12 11 DAC Output Amp. and Low-pass Filter DAC Output Amp. and Low-pass Filter Power Supply 54 69 7 VOUTL 10 VCOM 8 VOUTR ZEROL ZEROR VDD DGND VCC AGND Figure 73 BLOCK DIAGRAM OF IC - 73 -

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– 73 –
SD-EX100
SD-EX101
IC900 VHiPCM1748E-1: D/A Converter (PCM1748E)
1
BCK
Input
Audio data bit clock input.
(1)
2
DATA
Input
Audio data digital input.
(1)
3
LRCK
Input
L-channel and R-channel audio data latch enable input.
(1)
4
DGND
Digital ground.
5
VDD
Digital power supply,+3.3V.
6
VCC
Analog power supply,+5V.
7
VOUTL
Output
Analog output for L-channel.
8
VOUTR
Output
Analog output for R-channel.
9
AGND
Analog ground.
10
VCOM
Common voltage decoupling.
11*
ZEROR/ZEROA
Output
Zero flag output for R-channel/Zero flag output for L/R-channel.
12*
ZEROL/NA
Output
Zero flag output for L-channel/No assign.
13
MD
Input
Mode control data input.
(2)
14
MC
Input
Mode control clock input.
(2)
15
ML
Input
Mode control latch input.
(2)
16
SCK
Input
System clock input
Pin
No.
Function
Terminal Name
NOTE:
(1) Schmitt trigger input,5V tolerant.
(2) Schmitt trigger input with internal pull-down,5V tolerant
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
SCK
ML
MC
MD
ZEROL/NA
ZEROR/ZEROA
VCOM
AGND
BCK
DATA
LRCK
DGND
VDD
VCC
VOUTL
VOUTR
In this unit, the terminal with asterisk mark (*) is open terminal which is not connected to the outside.
Input/
Output
ZEROL
BCK
Audio
Serial
Port
VOUTL
1
LRCK
3
DATA
2
ML
15
MC
14
MDI
13
SCK
16
12
ZEROR
11
VDD
5
DGND
4
VCC
6
AGND
9
7
VOUTR
8
VCOM
10
Output Amp. and
Low-pass Filter
DAC
DAC
Output Amp. and
Low-pass Filter
8x
Oversampling
Digital Filter
with
Function
Controller
Enhanced
Multi-level
Delta-Sigma
Modulator
System Clock
Manager
System Clock
Zero Detect
Power Supply
Serial
Control
Port
Figure 73 BLOCK DIAGRAM OF IC