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Hitachi T7K250 Specifications - Page 254

Command Completion Time Limit = content of the Feature register Previous

UPC - 000062373678

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If the WC bit is set to one and errors occur in transfer or writing of the data, the device shall continue to transfer the amount of data requested and then provide ending status with BSY bit cleared to zero, the SE bit set to one, the ERR bit cleared to zero, and the type of error, ICRC, IDNF or ABRT reported in the error log. If the WC bit is set to one and the Command Completion Time Limit expires, the device shall stop execution of the command and provide ending status with the BSY bit cleared to zero, the SE bit set to one, the ERR bit cleared to zero, and report the fact that the Command Completion Time Limit expired by setting the CCTO bit in the error log to one. In all cases, the device shall attempt to transfer the amount of data requested within the Command Completion Time Limit even if some data transferred is in error. F (bit 5) HSE (bit 4) Stream ID (bit 0.2) Feature Previous F specifies that all data for the specified stream shall be flushed to the media before command complete is reported when set to one. HSE (Handle Stream Error) specifies that this command starts at the LBA of the last reported error for this stream, so the device may attempt to continue its corresponding error recovery sequence where it left earlier. Stream ID specifies the stream being written. The device shall operate according to the Stream ID set by the Write Stream command. The time allowed for the current command's completion is calculated as follows: Command Completion Time Limit = (content of the Feature register Previous) * (Identify Device words (99:98)) useconds If the value is zero, the device shall use the Default CCTL supplied with a previous Configure Stream command for this Stream ID. If the Default CCTL is zero, or no previous Configure Stream command was defined for this Stream ID, the device will ignore the CCTL. The time is measured from the write of the command register to the final INTRQ for command completion. Sector Count Current Sector Count Previous Sector Number Current Sector Number Previous Cylinder Low Current Cylinder Low Previous Cylinder High Current Cylinder High Previous The number of continuous sectors to be transferred low order, bits (7:0) The number of coninuous sectors to be transferred high order, bits (15:8). If zero is specified in the Sector Count register, then 65,536 sectors will be transferred. LBA (7:0) LBA (31:24) LBA (15:8) LBA (39:32) LBA (23:16) LBA (47:40) Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Deskstar T7K250 Hard Disk Drive Specification 240

Section	Page
1.0 General	15
1.1 Introduction	15
1.2 References	15
1.3 Abbreviations	15
1.4 Caution	17
2.0 General features of the drive	19
3.0 Fixed-disk subsystem description	23
3.1 Control electronics	23
3.2 Head disk assembly	23
3.3 Actuator	23
4.0 Drive characteristics	25
4.1 Default logical drive parameters	25
4.2 Data sheet	25
4.3 World Wide Name Assignment	26
4.4 Drive organization	27
4.4.1 Drive format	27
4.4.2 Cylinder allocation	27
4.5 Performance characteristics	29
4.5.1 Command overhead	29
4.5.2 Mechanical positioning	29
4.5.3 Drive ready time	31
4.5.4 Data transfer speed	32
4.5.5 Throughput	33
4.5.6 Operating modes	34
5.0 Defect flagging strategy	35
6.0 Electrical interface specification	37
6.1 Connector location	37
6.1.1 DC power connector	38
6.1.2 AT signal connector	38
6.2 Signal definitions(PATA model)	39
6.3 Signal descriptions	40
6.4 Interface logic signal levels(PATA model)	43
6.5 Signal definition (SATA model)	43
6.5.1 TX+ / TX-	44
6.5.2 RX+ / RX-	44
6.6 Out of band signaling (SATA model)	44
6.7 Reset timings	45
6.8 PIO timings	46
6.8.1 Write DRQ interval time	46
6.8.2 Read DRQ interval time	47
6.9 Multi word DMA timings	48
6.10 Ultra DMA timings	49
6.10.1 Initiating Read DMA	49
6.10.2 Host Pausing Read DMA	50
6.10.3 Host Terminating Read DMA	51
6.10.4 Device Terminating Read DMA	52
6.10.5 Initiating Write DMA	53
6.10.6 Device Pausing Write DMA	54
6.10.7 Device Terminating Write DMA	55
6.10.8 Host Terminating Write DMA	56
6.11 Addressing of registers	57
6.11.1 Cabling	57
7.0 Specification	61
7.1 Jumper settings	61
7.1.1 Jumper pin location	61
7.1.2 Jumper pin identification	61
7.1.3 Jumper pin assignment	62
7.1.4 Jumper positions	63
7.2 Environment	67
7.2.1 Temperature and humidity	67
7.2.2 Corrosion test	68
7.3 DC power requirements	68
7.3.1 Input voltage	68
7.3.2 Power supply current (typical)	69
7.3.3 Power supply generated ripple at drive power connector	70
7.4 Reliability	71
7.4.1 Data integrity	71
7.4.2 Cable noise interference	71
7.4.3 Start/stop cycles	71
7.4.4 Preventive maintenance	71
7.4.5 Data reliability	71
7.4.6 Required power-off sequence	71
7.5 Mechanical specifications	72
7.5.1 Physical dimensions and weight	72
7.5.2 Mounting hole locations	73
7.5.3 Connector locations	74
7.5.4 Drive mounting	74
7.5.5 Heads unload and actuator lock	75
7.6 Vibration and shock	76
7.6.1 Operating vibration	76
7.6.2 Nonoperating vibration	76
7.6.3 Operating shock	77
7.6.4 Nonoperating shock	77
7.6.5 Nonoperating rotational shock	78
7.7 Acoustics	79
7.8 Identification labels	79
7.9 Safety	80
7.9.1 UL and CSA approval	80
7.9.2 German safety mark	80
7.9.3 Flammability	80
7.9.4 Safe handling	80
7.9.5 Environment	80
7.9.6 Secondary circuit protection	80
7.10 Electromagnetic compatibility	81
7.10.1 CE mark	81
7.10.2 C-TICK mark	81
7.10.3 BSMI mark	81
7.11 Packaging	81
8.0 General	83
8.1 Introduction	83
8.2 Terminology	83
8.3 Deviations from standard	83
9.0 Registers	85
9.1 Register set	85
9.2 Alternate Status Register	86
9.3 Command Register	86
9.4 Cylinder High Register	86
9.5 Cylinder Low Register	86
9.6 Data Register	87
9.7 Device Control Register	87
9.8 Drive Address Register	88
9.9 Device/Head Register	88
9.10 Error Register	89
9.11 Features Register	89
9.12 Sector Count Register	89
9.13 Sector Number Register	90
9.14 Status Register	90
10.0 General operation	93
10.1 Reset response	93
10.2 Register initialization	94
10.3 Diagnostic and Reset considerations	95
10.4 Sector Addressing Mode	96
10.4.1 Logical CHS addressing mode	96
10.4.2 LBA addressing mode	96
10.5 Overlapped and queued feature	96
10.6 Power management features	98
10.6.1 Power mode	98
10.6.2 Power management commands	98
10.6.3 Standby timer	98
10.6.4 Interface capability for power modes	99
10.7 S.M.A.R.T. Function	100
10.7.1 Attributes	100
10.7.2 Attribute values	100
10.7.3 Attribute thresholds	100
10.7.4 Threshold exceeded condition	100
10.7.5 S.M.A.R.T. commands	100
10.7.6 Off-line read scanning	100
10.7.7 Error log	101
10.7.8 Self-test	101
10.8 Security Mode Feature Set	102
10.8.1 Security mode	102
10.8.2 Security level	102
10.8.3 Passwords	103
10.8.4 Operation example	103
10.8.5 Command table	106
10.9 Host Protected Area Feature	107
10.9.1 Example for operation (In LBA Mode)	107
10.9.2 Security extensions	108
10.10 Seek overlap	109
10.11 Write cache function	110
10.12 Reassign function	111
10.12.1 Auto Reassign function	111
10.13 Power-Up in Standby feature set	112
10.14 Advanced Power Management feature set (APM)	113
10.15 Automatic Acoustic Management feature set (AAM)	114
10.16 Address Offset Feature	115
10.16.1 Enable/Disable Address Offset Mode	115
10.16.2 Identify Device Data	116
10.16.3 Exceptions in Address Offset Mode	116
10.17 48-bit Address Feature Set	117
10.18 Streaming Feature Set	117
10.18.1 Streaming commands	118
11.0 Command protocol	121
11.1 PIO Data In commands	121
11.2 PIO Data Out Commands	122
11.3 Non-data commands	124
11.4 DMA commands	125
11.5 DMA queued commands	126
12.0 Command descriptions	127
12.1 Check Power Mode (E5h/98h)	131
12.2 Device Configuration Overlay (B1h)	132
12.2.1 DEVICE CONFIGURATION RESTORE	132
12.2.2 DEVICE CONFIGURATION FREEZE LOCK (subcommand C1h)	132
12.2.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h)	133
12.2.4 DEVICE CONFIGURATION SET (subcommand C3h)	133
12.3 Execute Device Diagnostic (90h)	136
12.4 Flush Cache (E7h)	137
12.5 Flush Cache Ext (EAh)	138
12.6 Format Track (50h)	139
12.7 Format Unit (F7h)	140
12.8 Identify Device (ECh)	141
12.9 Idle (E3h/97h)	150
12.10 Idle Immediate (E1h/95h)	151
12.11 Initialize Device Parameters (91h)	152
12.12 NOP (00h)	153
12.13 Read Buffer (E4h)	154
12.14 Read DMA (C8h/C9h)	155
12.15 Read DMA Ext (25h)	157
12.16 Read DMA Queued (C7h)	159
12.17 Read DMA Queued Ext (26h)	161
12.18 Read Log Ext (2Fh)	163
12.18.1 General Purpose Log Directory	164
12.18.2 Extended Comprehensive SMART Error Log	165
12.18.3 Extended Self-test log sector	167
12.19 Read Long (22h/23h)	169
12.20 Read Multiple (C4h)	171
12.21 Read Multiple Ext (29h)	173
12.22 Read Native Max ADDRESS (F8h)	175
12.23 Read Native Max Address Ext (27h)	176
12.24 Read Sectors (20h/21h)	177
12.25 Read Sector(s) Ext (24h)	179
12.26 Read Stream DMA Ext (2Ah)	181
12.27 Read Stream PIO (2Bh)	184
12.28 Read Verify Sectors (40h/41h)	187
12.29 Read Verify Sector(s) (42h)	189
12.30 Recalibrate (1xh)	191
12.31 Security Disable Password (F6h)	192
12.32 Security Disable Password (F3h)	193
12.33 Security Erase Unit (F4h)	194
12.34 Security Freeze Lock (F5h)	196
12.35 Security Set Password (F1h)	197
12.36 Security Unlock (F2h)	199
12.37 Seek (7xh)	200
12.38 Service (A2h )	201
12.39 Set Features (EFh)	202
12.39.1 Set Transfer mode	203
12.39.2 Write Cache	203
12.39.3 Advanced Power Management	203
12.39.4 Automatic Acoustic Management	204
12.40 Set Max ADDRESS (F9h)	205
12.40.1 Set Max Set Password (Feature=01h)	207
12.40.2 Set Max Lock (Feature=02h)	208
12.40.3 Set Max Unlock (Feature = 03h)	209
12.40.4 Set Max Freeze Lock (Feature = 04h)	210
12.41 Set Max Address Ext (37h)	211
12.42 Sleep (E6h/99h)	213
12.43 S.M.A.R.T. Function Set (B0h)	214
12.43.1 S.M.A.R.T. Function Subcommands	214
12.43.2 Device Attribute Data Structure	218
12.43.3 Device Attribute Thresholds data structure	221
12.43.4 S.M.A.R.T. Log Directory	223
12.43.5 S.M.A.R.T. summary error log sector	223
12.43.6 Self-test log data structure	225
12.43.7 Error reporting	226
12.44 Standby (E2h/96h)	227
12.45 Standby Immediate (E0h/94h)	228
12.46 Write Buffer (E8h)	229
12.47 Write DMA Queued (CAh/CBh)	230
12.48 Write DMA FUA Ext (3Dh)	232
12.49 Write DMA Ext (35h)	234
12.50 Write FPDMA Queued (61h)	236
12.51 Write Log Ext (3Fh)	238
12.52 Write Long (32h/33h)	239
12.53 Write Multiple (C5h)	241
12.54 Write Multiple Ext (39h)	242
12.55 Write Multiple FUA Ext (CEh)	244
12.56 Write Sectors (30h/31h)	246
12.57 Write Sector(s) (34h)	248
12.58 Write Stream DMA (3Ah)	250
12.59 Write Stream PIO (3Bh)	253

Match case Limit results 1 per page

Deskstar T7K250 Hard Disk Drive Specification

240

If the WC bit is set to one and errors occur in transfer or writing of the data, the device

shall continue to transfer the amount of data requested and then provide ending status with

BSY bit cleared to zero, the SE bit set to one, the ERR bit cleared to zero, and the type of

error, ICRC, IDNF or ABRT reported in the error log.

If the WC bit is set to one and the Command Completion Time Limit expires, the device

shall stop execution of the command and provide ending status with the BSY bit cleared to

zero, the SE bit set to one, the ERR bit cleared to zero, and report the fact that the Com-

mand Completion Time Limit expired by setting the CCTO bit in the error log to one.

In all cases, the device shall attempt to transfer the amount of data requested within the

Command Completion Time Limit even if some data transferred is in error.

F (bit 5)

F specifies that all data for the specified stream shall be flushed to the media before com-

mand complete is reported when set to one.

HSE (bit 4)

HSE (Handle Stream Error) specifies that this command starts at the LBA of the last

reported error for this stream, so the device may attempt to continue its corresponding

error recovery sequence

where it left earlier.

Stream ID (bit 0.2)

Stream ID specifies the stream being written. The device shall operate according to the

Stream ID set by the Write Stream command.

Feature Previous

The time allowed for the current command's completion is calculated as follows:

Command Completion Time Limit = (content of the Feature register Previous) *

(Identify Device words (99:98)) useconds

If the value is zero, the device shall use the Default CCTL supplied with a previ-

ous Configure Stream command for this Stream ID.

If the Default CCTL

is zero,

or no previous Configure Stream command was defined for this Stream ID, the

device will ignore the CCTL.

The time is measured from the write of the com-

mand register to the final INTRQ for command completion.

Sector Count Current

The number of continuous sectors to be transferred low order, bits (7:0)

Sector Count Previous

The number of coninuous sectors to be transferred high order, bits

(15:8). If zero is specified in the Sector Count register, then

65,536 sectors will be transferred.

Sector Number Current

LBA (7:0)

Sector Number Previous

LBA (31:24)

Cylinder Low Current

LBA (15:8)

Cylinder Low Previous

LBA (39:32)

Cylinder High Current

LBA (23:16)

Cylinder High Previous

LBA (47:40)

Input parameters from the device

Sector Number (HOB=0)

LBA (7:0) of the address of the first unrecoverable error.