Foxconn A78AX-K English manual. - Page 39
► Memory Speed Mode, ► Memory Speed Adjust, ► DRAM Timing Mode, ► CAS Latency - tCL, ► tRCD RAS-to- - am2 motherboard s
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DRAM Timing Configuration CMOS Setup Utility - Copyright (C) 1985-2005, American Megatrends, Inc. DRAM Timing Configuration D�R�A�M�T�im�in�g �Co�n�fig�ur�at�io�n H�elp�I�te�m Memory Speed Mode A�ut�o]]� DRAM Timing Mode Au� to] Auto Limit M� anual Options 3 Move Enter:Select +/-/:Value F10:Save ESC:Exit F1:General Help F9:Optimized Defaults ► Memory Speed Mode This item is used to enable/disable provision of DRAM timing by SPD device. The Serial Presence Detect (SPD) device is a small EEPROM chip, mounted on a DDR2 memory module. It contains important information about the module's speed, size, addressing mode and various other parameters, so that the motherboard memory controller (chipset) can better access the memory device. Select [Auto] for SPD enable mode. Select [Limit], the DRAM speed will not exceed the specified value listed in the "Memory Speed Adjust" item. If SPD value is faster than "Memory Speed Adjust" value, it will run at the specified "Memory Speed Adjust" speed. Otherwise, SPD value is selected. Select [Manual], then DRAM speed is manually selected according to the set value of "Memory Speed Adjust". ► Memory Speed Adjust This item will appear only when the "Memory Speed Mode" is set to [Limit] or [Manual]. The available settings are : [400MHz], [533MHz], [667MHz], [800MHz], [1066MHz]. [1066MHz] will appear only in AM2+ CPU. ► DRAM Timing Mode When both DCTs (DRAM controller) are enabled in unganged mode, BIOS must initialize the frequency of each DCT in order. Settings are : [Auto]; [DCT 0]. (appear in AM2 CPU) Settings are : [Auto]; [DCT 0]; [DCT1]; [Both]. (appear in AM2+ CPU) ► CAS Latency - tCL The number of memory clocks it takes a DRAM to return data after the read CAS_L is asserted depends on the memory clock frequency. The value that BIOS programs into the memory controller is a function of the target clock frequency. The target clock frequency is determined from the supported CAS latencies at given clock frequencies of each DIMM. ► tRCD (RAS-to-CAS Delay) This item allows you to select a delay time (in clock cycles) between the CAS# and RAS# 32