Acer AR360 F1 User Manual - Page 70

54 3 System upgrades CPU1 CPU2 E X X X X X X NA NA NA XX X X NA NA NA F X X X X X X NA NA NA X X X X X X NA NA NA Note: 1. Place DIMMs in "X" location. DIMM population must correspond to the above tables. 2. DIMM modules support 1 GB, 2 GB and 4 GB DIMMs. 3. DIMM modules support 8 GB and 16 GB DIMMs (support depends on availability). 4. Do not mix UDIMMs with RDIMMs. 5. 3-DIMM per channel configuration is only available for single/dual rank RDIMM. Lockstep mode • In Lockstep Channel Mode, each memory access is a 128-bit data access that spans Channel 1 and Channel 2. This is done to support SDDC for DRAM devices with 8-bit wide data ports. The same address is used on both channels such that an address error on any channel is detectable by bad ECC. Lockstep Channel mode is the only RAS mode that supports x8 SDDC. • Channel 3 has no function and can't be populated in this mode. • Follow the population rules described in independent mode. • Lockstep mode needs the channel 1 & channel 2 with identical DIMM. DIMM slot populations within a channel do not have to be identical but the same DIMM slot location across channel 1 and channel 2 must be the same. DIMM1A and DIMM2A should be the same type, size and manufacturer. DIMM1B and DIMM2B memory should be the same type, size and manufacturer. DIMM1C and DIMM2C memory should be the same type, size and manufacturer. • Same rule is applied to the CPU2. Lockstep mode single processor configuration: Channel 1 DIMM slots Channel 2 DIMM slots Channel 3 DIMM slots Notes Configuration 1C 1B 1A 2C 2B 2A 3C 3B 3A A X X NA NA NA B XX X X NA NA NA