Foxconn H55M-S English Manual. - Page 35

Fox Central Control Unit CMOS Setup Utility - Copyright (C) 1985-2009, American Megatrends, Inc. Fox Central Control Unit ► CPU Configuration [Press Enter] CPU Clock [133] Ratio CMOS Setting [22] Adjust VTT Voltage [Default] Ratio Status: Unlocked (Min:09, Max:22) Ratio Actual Value:22 Current CPU Speed : 2.936GHz DRAM Frequency [Auto] Memory Timing by SPD [Auto] Adjust DRAM Voltage [Default] Current DRAM Speed :800MHz Help Item Configure CPU. 3 Move Enter:Select +/-/:Value F10:Save ESC:Exit F1:General Help F9:Optimized Defaults ► CPU Configuration Press to go to relative submenu. ► CPU Clock This item is used to adjust the CPU Clock. ► Ratio CMOS Setting This item is used to set the ratio between CPU Core Clock and the FSB Frequency. You can use [+] or [-] to adjust the value. ► Adjust VTT Voltage This item is used to set the CPU VTT voltage. ► DRAM Frequency This item is used to adjust the memory speed. Select [Auto] for SPD enable mode. You can select a value manually such as [800 MHz], [1067 MHz], [1333MHz] and [1600MHz]. ► Memory Timing by SPD This item is used to enable/disable provision of DRAM timing by SPD device. The Serial Presence Detect (SPD) device is a small EEPROM chip, mounted on a memory module. It contains important information about the module's speed, size, addressing mode and various other parameters, so that the motherboard memory controller (chipset) can better access the memory device. Select [Auto] for SPD enable mode. Select [Manual] to set the parameters by yourself. The following 10 settings are valid only when the Memory Timing by SPD is set to [Manual]. ► DRAM tCL The number of memory clocks it takes a DRAM to return data after the read CAS_L is asserted depends on the memory clock frequency. The value that BIOS programs into the memory controller is a function of the target clock frequency. The target clock frequency is determined from the supported CAS latencies at given clock frequencies of each DIMM. ► DRAM tRAS (Active-to-Precharge Delay) This item allows you to set the minimum RAS# active time (in clock cycles). 28