Asus RS500A-E11-RS4U RS500A-E11 Series User Manual - Page 25

ASUS RS500A-E11 Series

Page 25 highlights

Action PSP Boot PHASE PSP Boot Loader phase (Status Post Codes) POST CODE 0xA0 0xA1 0xA2 0xA3 0xA4 0xA5 0xA6 0xA7 0xA8 0xA9 0xAA 0xAB 0xAC 0xAD 0xAE 0xAF 0xB0 0xB1 0xB2 0xB3 0xB4 0xB5 0xB6 0xB7 0xB8 0xB9 0xBA 0xBB 0xBC 0xBD 0xBE 0xBF 0xC0 0xC1 0xC2 0xC3 0xC4 0xC5 0xC6 0xC7 0xC8 0xC9 0xCA 0xCB 0xCC 0xCD 0xCE 0xCF 0xD0 0xD1 0xD2 0xD3 0xD4 0xD5 0xD6 0xD7 0xD8 0xD9 TYPE Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress Progress DESCRIPTION Bootloader successfully entered C Main Master initialized C2P / slave waited for master to init C2P HMAC key successfully derived Master got Boot Mode and sent boot mode to all slaves SpiRom successfully initialized BIOS Directory successfully read from SPI to SRAM Early unlock check Inline Aes key successfully derived Inline-AES key programming is done Inline-AES key wrapper derivation is done Bootloader successfully loaded HW IP configuration values Bootloader successfully programmed MBAT table Bootloader successfully loaded SMU FW PSP and SMU configured WAFL User mode test harness completed successfully Bootloader loaded Agesa0 from SpiRom AGESA phase has completed RunPostDramTrainingTests() completed successfully SMU FW Successfully loaded to SMU Secure DRAM Sent all required boot time messages to SMU Validated and ran Security Gasket binary UMC Keys generated and programmed Inline AES key wrapper stored in DRAM Completed FW Validation step Completed FW Validation step BIOS copy from SPI to DRAM complete Completed FW Validation step BIOS load process fully complete Bootloader successfully release x86 Early Secure Debug completed GetFWVersion command received from BIOS is completed SMIInfo command received from BIOS is completed Successfully entered WarmBootResume() Successfully copied SecureOS image to SRAM Successfully copied trustlets to PSP Secure Memory About to jump to Secure OS (SBL about to copy and jump) Successfully restored CCP and UMC state on S3 resume PSP SRAM HMAC validated by Mini BL About to jump to

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ASUS RS500A-E11 Series
1-15
Action
PHASE
POST CODE
TYPE
DESCRIPTION
PSP Boot
PSP Boot Loader
phase (Status Post
Codes)
0xA0
Progress
Bootloader successfully entered C Main
0xA1
Progress
Master initialized C2P / slave waited for master to init C2P
0xA2
Progress
HMAC key successfully derived
0xA3
Progress
Master got Boot Mode and sent boot mode to all slaves
0xA4
Progress
SpiRom successfully initialized
0xA5
Progress
BIOS Directory successfully read from SPI to SRAM
0xA6
Progress
Early unlock check
0xA7
Progress
Inline Aes key successfully derived
0xA8
Progress
Inline-AES key programming is done
0xA9
Progress
Inline-AES key wrapper derivation is done
0xAA
Progress
Bootloader successfully loaded HW IP configuration values
0xAB
Progress
Bootloader successfully programmed MBAT table
0xAC
Progress
Bootloader successfully loaded SMU FW
0xAD
Progress
PSP and SMU configured WAFL
0xAE
Progress
User mode test harness completed successfully
0xAF
Progress
Bootloader loaded Agesa0 from SpiRom
0xB0
Progress
AGESA phase has completed
0xB1
Progress
RunPostDramTrainingTests() completed successfully
0xB2
Progress
SMU FW Successfully loaded to SMU Secure DRAM
0xB3
Progress
Sent all required boot time messages to SMU
0xB4
Progress
Validated and ran Security Gasket binary
0xB5
Progress
UMC Keys generated and programmed
0xB6
Progress
Inline AES key wrapper stored in DRAM
0xB7
Progress
Completed FW Validation step
0xB8
Progress
Completed FW Validation step
0xB9
Progress
BIOS copy from SPI to DRAM complete
0xBA
Progress
Completed FW Validation step
0xBB
Progress
BIOS load process fully complete
0xBC
Progress
Bootloader successfully release x86
0xBD
Progress
Early Secure Debug completed
0xBE
Progress
GetFWVersion command received from BIOS is completed
0xBF
Progress
SMIInfo command received from BIOS is completed
0xC0
Progress
Successfully entered WarmBootResume()
0xC1
Progress
Successfully copied SecureOS image to SRAM
0xC2
Progress
Successfully copied trustlets to PSP Secure Memory
0xC3
Progress
About to jump to Secure OS (SBL about to copy and jump)
0xC4
Progress
Successfully restored CCP and UMC state on S3 resume
0xC5
Progress
PSP SRAM HMAC validated by Mini BL
0xC6
Progress
About to jump to <t-base in Mini BL
0xC7
Progress
VMG ECDH unit test started
0xC8
Progress
VMG ECDH unit test passed
0xC9
Progress
VMG ECC CDH primitive unit test started
0xCA
Progress
VMG ECC CDH primitive unit test passed
0xCB
Progress
VMG SP800-108 KDF-CTR HMAC unit test started
0xCC
Progress
VMG SP800-108 KDF-CTR HMAC unit test passed
0xCD
Progress
VMG LAUNCH_* test started
0xCE
Progress
VMG LAUNCH_* test passed
0xCF
Progress
MP1 has been taken out of reset
0xD0
Progress
PSP and SMU Reserved Addresses correct
0xD1
Progress
Reached Naples steady-state WFI loop
0xD2
Progress
Knoll device successfully initialized
0xD3
Progress
32-byte RandOut successfully returned from Knoll
0xD4
Progress
32-byte MAC successfully received from Knoll.
0xD5
Progress
Knoll device verified successfully
0xD6
Progress
Done enabling power for Knoll
0xD7
Progress
Enter recovery mode due to trustlet validation fail.
0xD8
Progress
Enter recovery mode due to OS validation fail.
0xD9
Progress
Enter recovery mode due to OEM public key not found.
(continued on the next page)