Asus PRIME H610M-R Intel 600 series Channel BIOS UM English - Page 30
Mem Over Clock Fail Count, Mrc Training Loop Count
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tCCD_L_tDLLK Configuration options: [Auto] [0] - [15] Misc. MRC Fast Boot Allows you to enable or disable the MRC fast boot. Configuration options: [Disabled] [Enabled] MCH Full Check Enable this item to enhance the system stability. Setting this item to [Disabled] may enhance the DRAM overclocking capability. Configuration options: [Auto] [Enabled] [Disabled] Mem Over Clock Fail Count Configuration options: [Auto] [1] - [255] Training Profile Allows you to select the DIMM training profile. Configuration options: [Auto] [Standard Profile] [ASUS User Profile] RxDfe Allows you to set the DFE on SOC Rx. Configuration options: [Auto] [Enabled] [Disabled] Mrc Training Loop Count Allows you to set the exponential number of loops to run the test. Configuration options: [Auto] [0] - [32] DRAM CLK Period Allows you to set the DRAM clock period. Configuration options: [Auto] [0] - [161] Controller 0, Channel 0 Control Allows you to enable or disable Controller 0, Channel 0. Configuration options: [Enabled] [Disabled] Controller 0, Channel 1 Control Allows you to enable or disable Controller 0, Channel 1. Configuration options: [Enabled] [Disabled] Controller 1, Channel 0 Control Allows you to enable or disable Controller 1, Channel 0. Configuration options: [Enabled] [Disabled] Controller 1, Channel 1 Control Allows you to enable or disable Controller 1, Channel 1. Configuration options: [Enabled] [Disabled] MC_Vref0-2 Configuration options: [Auto] [0] - [65533] 30 PRIME / ProArt / TUF GAMING Intel 600 Series BIOS Manual